Pynq is a famous framework that allows programmers to directly work with FPGA using Python language, which is very intuitive, so let’s take a look at it.
When we want to accelerate a specific software portion, it is generally difficult to interface to it correctly, because you have to synchronize the CPU (generally referred to as Process System, PS) to the FPGA part (generally referred to as Programmable Logic, PL). In modern SoCs, we use the “axi” interface to make the two parts communicate, but its Hardware Description Language (HDL) implementation is very verbose, and also we prefer to have some at higher levels!
Pynq is then the framework who saves our time and make possible to directly work with PL from the highest level possible.
We will use few lines of python code to communicate with our PL side and control it with a very simple state machine (which is automatically generated from Vivado HLS, so its standard for every usage!).
After in fact having built our IP module, we just need to place it in a folder with its HWH file (which is the hardware description), and in just a few very simple python line code you will have the IP automatically loaded in PL side and its interface available as a simple function you will write in Python!
If this has inspired you, I’ll suggest taking a closer look at our simple tutorial (written and video also) on our public GitHub:
Thanks for reading and enjoy your acceleration,
Guglielmo Zanni – R&D Makarenalabs S.R.L.